The 9100A Tester Floppy Interface
The I/O map for the 9100a floppy auxiliary control port:
| Bit |
Port 8000 (floppy latch) |
| 8 | DS0 |
| 9 | DS1 |
| 14 | Spare |
| 12 | Mini |
| 13 | DENS |
| 10 | P0 |
| 11 | P1 |
| 15 | EN_INT |
My initial analysis of the pins for the HD235HG drive; the standard floppy spec; and the 9100a schematic.
| Pin | TEAC FD245HG | Regular | Regular | 9100a | 9100a | |||
| 2 | NC - ground option | /REDWC | Density Select | /Spare | Output | Bit 14 | ||
| 4 | NC - option | n/c | Reserved | CHNG2 | Input | Bit 2/PLCC | ||
| 6 | NC | n/c | Reserved | /DS3 | NC | |||
| 8 | /INDEX | /INDEX | Index | /Index | match | |||
| 10 | NC - DS0 option | /MOTEA | Motor Enable A | /DS0 | Output | Bit 8 | Rejumper 10 and 12 | |
| 12 | DS1 - NC option | /DRVSB | Drive Sel B | /DS1 | match? | Output | Bit 9 | so that drive responds to DS0 |
| 14 | NC | /DRVSA | Drive Sel A | CHNG1 | Input | Bit 3/PLCC | ||
| 16 | /Motor Enable | /MOTEB | Motor Enable B | NC | NC | Link to pin 10 on floppy | ||
| 18 | /DIR | /DIR | Direction | /STEP IN | match | |||
| 20 | /STEP | /STEP | Step | /STEP IN | match | |||
| 22 | /WDATE | /WDATE | Write Data | /WRDATA | match | |||
| 24 | /WGATE | /WGATE | Floppy Write Enable | /WG | match | |||
| 26 | /TRK00 | /TRK00 | Track 0 | /TRACK0 | match | |||
| 28 | /WPT | /WPT | Write Protect | /WT PRT | match | |||
| 30 | /RDATA | /RDATA | Read Data | /RD DATA | match | |||
| 32 | /SIDE1 | /SIDE1 | Head Select | /SS0 | match | |||
| 34 | /DSKCHG | Disk Change | /READY | Direct connect to ready input on 1797 FDD controller | ||||